TSMC’s New 3nm Chip Wafers Priced at $20,000
TSMC released pricing for their latest and smallest chip node technology at a 25% price hike over their current 5nm wafer. The new wafers with 3nm node technology will be priced at $20,000 apiece. This news comes as a surprise as Samsung already announced partnerships with major electronics companies which could shift the market share balance away from Taiwan.
What is TSMC’s 3nm Node Wafer?
TSMC (Taiwan Semiconductor Manufacturing Company) is the world’s leading manufacturer of advanced computer chips, producing over 50% of all advanced semiconductors sold globally.
TSMC is debuting 3N technology which significantly increases the density of transistors that can be placed on a semiconductor wafer. This leads to increased performance and reduced power consumption. TSMC announced that the 3nm node will reduce power consumption by up to 30% and increase speeds by up to 15%, compared to their previous 5nm node.
Shown below is a table of the transistor density based on the node process size. As the node process improves (size becomes smaller), the transistor density increases.
|Node Process||Year of Introduction||Transistor Density|
|7nm FinFET||2018||90-102 million transistors/mm^2|
|5nm FinFET||2020||130-230 million transistors/mm^2|
|3nm FinFET||2022||300 million transistors/mm^2|
For context, an Apple MacBook containing the M1 Pro processor uses 5nm technology and boasts 57 billion transistors total, at a density of approximately 200 million transistors per square millimeter.
Justifying the Price of the 3nm Process Wafer
This 25% price hike for the 3nm wafer will force electronics manufacturers to raise their prices, resulting in higher priced graphics cards, processors, and smartphones.
|TSMC Wafers||Pricing||Increase in Density|
|7nm FinFET Wafer||$10,000 USD||2x increase from 8nm to 7nm|
|5nm FinFET Wafer||$16,000 USD||1.8x increase from 7nm to 5nm|
|3nm FinFET Wafer||$20,000 USD||1.3 increase from 5nm to 3nm|
As shown above, the rate of increase in transistor density is no longer doubling every two years. Back in 1965, Gordon Moore, the co-founder of Intel, made a prediction that the transistor density on a chip would roughly double every two years while the cost of the chip would continue to decrease. This trend, otherwise known as Moore’s Law, shows an exponential increase in the processing power of new chips. However, with only a 30% increase in transistor density from the 5nm to 3nm wafer, it seems that chip density has significantly slowed in progress, no longer the typical increase of nearly 2x in density.
Samsung’s 3nm Wafer vs TSMC’s 3nm Wafer
Samsung also debuted a 3nm process wafer based on the superior GAAFET technology, while TSMC is building their 3nm wafer on the older FinFET technology.
This news boosts Samsung’s competitiveness as they are securing buyers for their 3nm process wafers. Samsung publicly announced that they struck deals with major manufacturers including Qualcomm, Nvidia, IBM and Baidu. As Apple, AMD, and Nvidia currently source their 5nm chip wafers from TSMC, shifting to Samsung’s 3nm wafer could spell the coming of a major market share shift.
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